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SDR Memory

SDR DDR SDRAM (double data rate synchronous dynamic random access memory) is a class of memory integrated circuit utilized in computer's. It achieves twice the bandwidth of the previous [single data rate] SDRAM by double pump (transferring data on the rising and falling edges of the clock signal) without increasing the frequencies.

With data being transferred 64 bits at a time, DDR SDRAM gives a transfer rate of × 2 (for 2 rate) × 64 (number of bits transferred) / 8 (number of bits/byte). With a bus frequency of 100 MHz, DDR SDRAM gives a maximum transfer rate of 1600 MB/s.

Chip characteristics
DRAM density. Size of the chip in megabits. Example: 256 Mbit — 32 MB chip.
DRAM organization. Written in the form of 64M x 4, where 64M is a number of storage units (64 million), x4 (pronounced «by 4») — number of bits per chip, which equals the number of bits per storage unit. There are x4, x8, and x16 DDR chips. The x4 chips allow the use of advanced error correction features like Chipkill, memory scrubbing and Intel SDDC, while the x8 and x16 chips are somewhat more expensive.

Module characteristics
Capacity
Number of DRAM Devices. The number of chips is a multiple of 8 for non-ECC modules and a multiple of 9 for ECC modules. Chips can occupy one side (Single Sided) or both sides (Dual Sided) of the module.

The maximum amount of chips per DDR module is 36 (9x4).
Number of DRAM ranks (also known as rows or sides). Any given module can have 1, 2 or 4 ranks, but only one rank of a module can be active at any moment of time. When a module has two or more ranks, the memory controller must periodically switch between them by performing open operations. Please don't confuse rows in this context with rows used to describe internal chip architecture . The term sides is also confusing because it incorrectly suggests that this is tied to the physical placement of chips on the module.

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